Low temperature a-Si:H TFTs with an SiO2 gate insulator deposited by liquid phase deposition

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dc.contributor.authorCross, R. B. M.en
dc.contributor.authorOxley, D. P.en
dc.contributor.authorManhas, M.en
dc.contributor.authorSankara Narayanan, E. M.en
dc.date.accessioned2013-11-04T14:15:58Z
dc.date.available2013-11-04T14:15:58Z
dc.date.issued2004
dc.funderEPSRC (Engineering and Physical Sciences Research Council)en
dc.identifier.citationCross, R. B. M., Oxley, D. P., Manhas, M. and Sankara Narayanan E. M. (2004) Low temperature a-Si:H TFTs with an SiO2 gate insulator deposited by liquid phase deposition. Materials Research Society Symposium Proceedings. 808 pp. 697-702.en
dc.identifier.doihttps://doi.org/10.1557/PROC-808-A4.18
dc.identifier.urihttp://hdl.handle.net/2086/9295
dc.language.isoenen
dc.projectidLow Temperature a-Si:H for Large Area electronic Applicationsen
dc.publisherMaterials Research Societyen
dc.researchgroupEmerging Technologies Research Centreen
dc.researchinstituteInstitute of Engineering Sciences (IES)en
dc.titleLow temperature a-Si:H TFTs with an SiO2 gate insulator deposited by liquid phase depositionen
dc.typeConferenceen

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